![]() Number of required tiles is based on number of used chips. Tiles can be horizontal or vertical sub-pictures. *Note the multichip decoder requires the use of equally divided tiles. For instance, the 4kp60 performance numbers are theoretically derived from 4kp30. The ones marked with an asterisk (*) are extrapolated. *Note: Not all the # of cores and devices needed are measured values. # of TMS320C6678 DSPs / # of C66x DSP cores needed This decoder is used for any performance measurements mentioned below.H.265 / High Efficiency Video Coding (HEVC) decode The datasheet also includes information on the configurations used in each of the scenarios mentioned in the table above. *For a complete list of H.264 / AVC supported decode resolutions, frame rates and profiles (including Base profile and Main profile) on C6678 devices, please see the H.264 HP decoder datasheet. This decoder is used for the performance measurements mentioned below.The following tables are intended to provide an estimate of the number of C66x DSP cores and TMS320C6678 devices needed to enable various decode solutions on TI’s DSPs.This power efficient and flexible solution allows support for a large variety of video decode configurations, frame rates and profiles, including those still under development. TI enables a variety of options for decode of video bitstreams from single channel to high density processing. ![]() ![]() *For a complete list of supported H.265 / HEVC encode resolutions, frame rates and profiles (including standard profile) on C6678 devices, as well as to see the device and system parameter and assumptions, please see the HEVC encoder datasheet. The C66x DSP cores were running at 1.25GHz and the DDR3 external memory interface operating at 1333MHz data rate. *The measurements were performed on the Advantech DSP-8681 (Half-length PCIe card with 4 TMS320C6678 DSPs) and DSP-8682 (Full length PCIe Card with 8 TMS320C6678 DSPs). Values marked with an asterisk (*) are extrapolated. H.265 encoder main profile configurations This encoder is used for performance measurements mentioned below.H.265 / High Efficiency Video Coding (HEVC) encode *For a complete list of H.264 / AVC supported encode resolutions, frame rates and profiles (including Main Profile) on C6678 devices, please see the H.264 encoder datasheet. *The measurements were performed on the TMS320C6678 Evaluation Module with the C66x DSP Cores running at 1.25GHz and the DDR3 external memory interface operating at 1333MHz data rate. Number of TMS320C6678 devices needed at 1.25 GHz This encoder is used for the performance measurements mentioned below.The following tables are intended to provide an estimate of the number of C66x DSP cores and TMS320C6678 devices needed to enable various encode solutions on TI’s DSPs.With devices ranging from a single C66x DSP core running at 750 MHz to a multicore SoC with 8x C66x DSP cores running at 1.25GHz, TI DSPs provide a scalable, power efficient platform for enabling encode solutions from lower resolutions all the way up to full HD and Ultra HD.Performance data specified in each codec Datasheet.All codecs are eXpressDSP™ compliant and implement one of the XDM 1.x interfaces.XDC packaged and validated on a standard EVM in a Codec Engine-based test.
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |